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pittma
on May 30, 2025
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Beating Google's kernelCTF PoW using AVX512
ymms were used here on purpose! With full-width registers, the IFMA insns have a deleterious effect on frequency, at least in the Icelake timeframe.
anematode
on May 30, 2025
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Ye, hence a separate version for CPUs which don't have that problem. Although, maintaining so many of these RSA kernels does seem like a pain. Didn't realize u wrote that code; super cool that it's used in practice!
pittma
on May 30, 2025
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I am not the original author—this is adapted from an implementation by Shay Gueron, the author of that paper I linked, but I do agree that it's cool!
hnuser123456
on May 31, 2025
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zen5 can run avx512 at near full boost clocks:
https://chipsandcheese.com/p/zen-5s-avx-512-frequency-behavi...
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